rfc9669v2.txt		rfc9669.txt
	skipping to change at line 295 ¶		skipping to change at line 295 ¶
	|src_reg|dst_reg|		|src_reg|dst_reg|
	+-+-+-+-+-+-+-+-+		+-+-+-+-+-+-+-+-+
	and as follows on a big-endian host:		and as follows on a big-endian host:
	+-+-+-+-+-+-+-+-+		+-+-+-+-+-+-+-+-+
	|dst_reg|src_reg|		|dst_reg|src_reg|
	+-+-+-+-+-+-+-+-+		+-+-+-+-+-+-+-+-+
	*src_reg:* the source register number (0-10), except where		*src_reg:* the source register number (0-10), except where
	otherwise specified (64-bit immediate instructions Section 5.4		otherwise specified (64-bit immediate instructions (see
	reuse this field for other purposes)		Section 5.4) reuse this field for other purposes)
	*dst_reg:* the destination register number (0-10), unless		*dst_reg:* the destination register number (0-10), unless
	otherwise specified (future instructions might reuse this field		otherwise specified (future instructions might reuse this field
	for other purposes)		for other purposes)
	*offset:* signed integer offset used with pointer arithmetic, except		*offset:* signed integer offset used with pointer arithmetic, except
	where otherwise specified (some arithmetic instructions reuse this		where otherwise specified (some arithmetic instructions reuse this
	field for other purposes)		field for other purposes)
	*imm:* signed integer immediate value		*imm:* signed integer immediate value
	skipping to change at line 409 ¶		skipping to change at line 409 ¶
	| source | Value | Description |		| source | Value | Description |
	+========+=======+==========================================+		+========+=======+==========================================+
	| K | 0 | use 32-bit 'imm' value as source operand |		| K | 0 | use 32-bit 'imm' value as source operand |
	+--------+-------+------------------------------------------+		+--------+-------+------------------------------------------+
	| X | 1 | use 'src_reg' register value as source |		| X | 1 | use 'src_reg' register value as source |
	| | | operand |		| | | operand |
	+--------+-------+------------------------------------------+		+--------+-------+------------------------------------------+
	Table 4: Source Operand Location		Table 4: Source Operand Location
	*instruction class:* the instruction class (see Section 3.3)		*class:* the instruction class (see Section 3.3)
	4.1. Arithmetic Instructions		4.1. Arithmetic Instructions
	ALU uses 32-bit wide operands while ALU64 uses 64-bit wide operands		ALU uses 32-bit wide operands while ALU64 uses 64-bit wide operands
	for otherwise identical operations. ALU64 instructions belong to the		for otherwise identical operations. ALU64 instructions belong to the
	base64 conformance group unless noted otherwise. The 'code' field		base64 conformance group unless noted otherwise. The 'code' field
	encodes the operation as below, where 'src' refers to the source		encodes the operation as below, where 'src' refers to the source
	operand and 'dst' refers to the value of the destination register.		operand and 'dst' refers to the value of the destination register.
	+=======+======+=========+=======================================+		+=======+======+=========+=======================================+
	skipping to change at line 732 ¶		skipping to change at line 732 ¶
	For load and store instructions (LD, LDX, ST, and STX), the 8-bit		For load and store instructions (LD, LDX, ST, and STX), the 8-bit
	'opcode' field is divided as follows:		'opcode' field is divided as follows:
	+-+-+-+-+-+-+-+-+		+-+-+-+-+-+-+-+-+
	|mode |sz |class|		|mode |sz |class|
	+-+-+-+-+-+-+-+-+		+-+-+-+-+-+-+-+-+
	*mode:* The mode modifier is one of:		*mode:* The mode modifier is one of:
	+===============+=======+===================+===========+		+========+=======+===============================+=============+
	| mode modifier | Value | Description | Reference |		| mode | Value | Description | Reference |
	+===============+=======+===================+===========+		+========+=======+===============================+=============+
	| IMM | 0 | 64-bit immediate | Section |		| IMM | 0 | 64-bit immediate instructions | Section 5.4 |
	| | | instructions | 5.4 |		+--------+-------+-------------------------------+-------------+
	+---------------+-------+-------------------+-----------+		| ABS | 1 | legacy BPF packet access | Section 5.5 |
	| ABS | 1 | legacy BPF packet | Section |		| | | (absolute) | |
	| | | access (absolute) | 5.5 |		+--------+-------+-------------------------------+-------------+
	+---------------+-------+-------------------+-----------+		| IND | 2 | legacy BPF packet access | Section 5.5 |
	| IND | 2 | legacy BPF packet | Section |		| | | (indirect) | |
	| | | access (indirect) | 5.5 |		+--------+-------+-------------------------------+-------------+
	+---------------+-------+-------------------+-----------+		| MEM | 3 | regular load and store | Section 5.1 |
	| MEM | 3 | regular load and | Section |		| | | operations | |
	| | | store operations | 5.1 |		+--------+-------+-------------------------------+-------------+
	+---------------+-------+-------------------+-----------+		| MEMSX | 4 | sign-extension load | Section 5.2 |
	| MEMSX | 4 | sign-extension | Section |		| | | operations | |
	| | | load operations | 5.2 |		+--------+-------+-------------------------------+-------------+
	+---------------+-------+-------------------+-----------+		| ATOMIC | 6 | atomic operations | Section 5.3 |
	| ATOMIC | 6 | atomic operations | Section |		+--------+-------+-------------------------------+-------------+
	| | | | 5.3 |
	+---------------+-------+-------------------+-----------+
	Table 8: Mode Modifier		Table 8: Mode Modifier
	*sz (size):* The size modifier is one of:		*sz (size):* The size modifier is one of:
	+======+=======+=======================+		+======+=======+=======================+
	| size | Value | Description |		| size | Value | Description |
	+======+=======+=======================+		+======+=======+=======================+
	| W | 0 | word (4 bytes) |		| W | 0 | word (4 bytes) |
	+------+-------+-----------------------+		+------+-------+-----------------------+
	skipping to change at line 1316 ¶		skipping to change at line 1314 ¶
	documented in a public-facing specification. In the event of future		documented in a public-facing specification. In the event of future
	RFC documents for ISA extensions, experts may permit early assignment		RFC documents for ISA extensions, experts may permit early assignment
	before the RFC document is available, as long as a specification that		before the RFC document is available, as long as a specification that
	satisfies the above requirements exists.		satisfies the above requirements exists.
	8. References		8. References
	8.1. Normative References		8.1. Normative References
	[IEN137] Cohen, D., "ON HOLY WARS AND A PLEA FOR PEACE", IEN 137, 1		[IEN137] Cohen, D., "ON HOLY WARS AND A PLEA FOR PEACE", IEN 137, 1
	April 1980.		April 1980, <https://www.rfc-editor.org/ien/ien137.txt>.
	[RFC2119] Bradner, S., "Key words for use in RFCs to Indicate		[RFC2119] Bradner, S., "Key words for use in RFCs to Indicate
	Requirement Levels", BCP 14, RFC 2119,		Requirement Levels", BCP 14, RFC 2119,
	DOI 10.17487/RFC2119, March 1997,		DOI 10.17487/RFC2119, March 1997,
	<https://www.rfc-editor.org/info/rfc2119>.		<https://www.rfc-editor.org/info/rfc2119>.
	[RFC8126] Cotton, M., Leiba, B., and T. Narten, "Guidelines for		[RFC8126] Cotton, M., Leiba, B., and T. Narten, "Guidelines for
	Writing an IANA Considerations Section in RFCs", BCP 26,		Writing an IANA Considerations Section in RFCs", BCP 26,
	RFC 8126, DOI 10.17487/RFC8126, June 2017,		RFC 8126, DOI 10.17487/RFC8126, June 2017,
	<https://www.rfc-editor.org/info/rfc8126>.		<https://www.rfc-editor.org/info/rfc8126>.
End of changes. 4 change blocks.
	25 lines changed or deleted		23 lines changed or added
This html diff was produced by rfcdiff 1.48.